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DM385 Scheda tecnica(PDF) 240 Page - Texas Instruments |
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DM385 Scheda tecnica(HTML) 240 Page - Texas Instruments |
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240 / 281 page ![]() = Rtt A2 A3 A4 AT Vtt A3 = Rcp Rcp Cac DVDD_DDR[0] 0.1 µF A2 A3 A4 A2 A3 A4 AT AT A3 A3 DM385, DM388 SPRS821D – MARCH 2013 – REVISED DECEMBER 2013 www.ti.com Figure 8-64. CK Routing for Four Mirrored DDR3 Devices Figure 8-65. ADDR_CTRL Routing for Four Mirrored DDR3 Devices 8.13.3.14.2 Two DDR3 Devices Two DDR3 devices are supported on the DDR EMIF consisting of two x8 DDR3 devices arranged as one bank (CS), 16 bits wide, or two x16 DDR3 devices arranged as one bank (CS), 32 bits wide. These two devices may be mounted on a single side of the PCB, or may be mirrored in a pair to save board space at a cost of increased routing complexity and parts on the backside of the PCB. 8.13.3.14.2.1 CK and ADDR_CTRL Topologies, Two DDR3 Devices Figure 8-66 shows the topology of the CK net classes and Figure 8-67 shows the topology for the corresponding ADDR_CTRL net classes. 240 Peripheral Information and Timings Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: DM385 DM388 |
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