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DM385 Scheda tecnica(PDF) 245 Page - Texas Instruments |
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DM385 Scheda tecnica(HTML) 245 Page - Texas Instruments |
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245 / 281 page ![]() = Rtt A2 AT Vtt = Rcp Rcp Cac DVDD_DDR[0] 0.1 µF A2 AT A2 AT DM385, DM388 www.ti.com SPRS821D – MARCH 2013 – REVISED DECEMBER 2013 Figure 8-74. CK Routing for One DDR3 Device Figure 8-75. ADDR_CTRL Routing for One DDR3 Device 8.13.3.15 Data Topologies and Routing Definition No matter the number of DDR3 devices used, the data line topology is always point to point, so its definition is simple. 8.13.3.15.1 DQS and DQ/DM Topologies, Any Number of Allowed DDR3 Devices DQS lines are point-to-point differential, and DQ/DM lines are point-to-point singled ended. Figure 8-76 and Figure 8-77 show these topologies. Copyright © 2013, Texas Instruments Incorporated Peripheral Information and Timings 245 Submit Documentation Feedback Product Folder Links: DM385 DM388 |
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