TNETX3150A datasheet(102/113 Pages) TI1

102 / 113 page

TNETX3150/TNETX3150A

ThunderSWITCH™ 15-PORT 10-/100-MBIT/S ETHERNET™ SWITCH

SPWS027F – FEBRUARY 1997 – REVISED SEPTEMBER 1997

102

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

operating characteristics over recommended operating conditions (see Figure 43)

EEPROM interface

PARAMETER

TNETX3150

TNETX3150A

UNIT

NO.

PARAMETER

MIN

MAX

MIN

MAX

UNIT

fclock (ECLK)

Clock frequency, ECLK

kHz

td (ECLKH–EDIOL)

Delay time, from ECLK

↑ to EDIO↓ (see Note 13)

µs

td (EDIOL–ECLKL)

Delay time, from EDIO

↓ to ECLK↓ (see Note 13)

µs

td (ECLKL–EDIOX)

Delay time, from ECLK

↓ to EDIO changing (see Note 14)

µs

td (EDIOV–ECLKH)

Delay time, from EDIO valid output to ECLK

↑

µs

td (ECLKL–EDIOV)

Delay time, from ECLK

↓ to EDIO valid

µs

td (ECLKL–EDIOX)

Delay time, from ECLK

↓ to EDIO changing (see Note 15)

µs

td (ECLKH–EDIOX)

Delay time, from ECLK

↑ to EDIO invalid

µs

td (EDIOV–ECLKH)

Delay time, from EDIO valid input to ECLK

↑

µs

NOTES: 13. This is a start condition delay time during ECLK high.

14. This is a changing-data condition delay time for output EDIO.

15. This is a changing-data condition delay time for input EDIO.

ECLK

(output)

EDIO

(output)

EDIO

(input)

VALID

Figure 43. EEPROM Interface Timing

TNETX3150A Scheda tecnica(PDF) 102 Page - Texas Instruments

TNETX3150A Scheda tecnica(HTML) 102 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Scheda tecnica Scarica

Link URL