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STM32L072CB Scheda tecnica(PDF) 146 Page - STMicroelectronics |
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STM32L072CB Scheda tecnica(HTML) 146 Page - STMicroelectronics |
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146 / 147 page  Revision history STM32L072xx 146/147 DocID027100 Rev 3 22-Mar-2016 3 Updated number of SPIs on cover page and in Table 2: Ultra-low- power STM32L072xx device features and peripheral counts. Changed minimum comparator supply voltage to 1.65 V on cover page. Added minimum DAC supply voltage on cover page. Added number of fast and standard channels in Section 3.11: Analog-to-digital converter (ADC). Updated Section 3.17.2: Universal synchronous/asynchronous receiver transmitter (USART) and Section 3.17.4: Serial peripheral interface (SPI)/Inter-integrated sound (I2S) to mention the fact that USARTs with synchronous mode feature can be used as SPI master interfaces. Added baudrate allowing to wake up the MCU from Stop mode in Section 3.17.2: Universal synchronous/asynchronous receiver transmitter (USART) and Section 3.17.3: Low-power universal asynchronous receiver transmitter (LPUART). Section 6.3.15: 12-bit ADC characteristics: – Table 64: ADC characteristics: Distinction made between VDDA for fast and standard channels; added note 1. Added note 4. related to RADC. Updated fTRIG.. Updated tS and tCONV. – Updated equation 1 description. – Updated Table 65: RAIN max for fADC = 16 MHz for fADC = 16 MHz and distinction made between fast and standard channels. Updated RO and added Note 2. in Table 67: DAC characteristics. Added Table 74: USART/LPUART characteristics. Table 97. Document revision history Date Revision Changes |
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