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STM32L071KB Scheda tecnica(PDF) 135 Page - STMicroelectronics |
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STM32L071KB Scheda tecnica(HTML) 135 Page - STMicroelectronics |
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135 / 136 page  DocID027101 Rev 3 135/136 STM32L071xx Revision history 135 22-Mar-2016 3 Updated number of SPIs on cover page and in Table 2: Ultra-low- power STM32L071xx device features and peripheral counts. Changed minimum comparator supply voltage to 1.65 V on cover page. Added number of fast and standard channels in Section 3.11: Analog-to-digital converter (ADC). Updated Section 3.15.2: Universal synchronous/asynchronous receiver transmitter (USART) and Section 3.15.4: Serial peripheral interface (SPI)/Inter-integrated sound (I2S) to mention the fact that USARTs with synchronous mode feature can be used as SPI master interfaces. Added baudrate allowing to wake up the MCU from Stop mode in Section 3.15.2: Universal synchronous/asynchronous receiver transmitter (USART) and Section 3.15.3: Low-power universal asynchronous receiver transmitter (LPUART). Changed VDDA minimum value to 1.65 V in Table 25: General operating conditions. Section 6.3.15: 12-bit ADC characteristics: – Table 62: ADC characteristics: Distinction made between VDDA for fast and standard channels; added note 1. Added note 4. related to RADC. Updated fTRIG. and VAIN maximum value. Updated tS and tCONV. Added VREF+. – Updated equation 1 description. – Updated Table 63: RAIN max for fADC = 16 MHz for fADC = 16 MHz and distinction made between fast and standard channels. Added Table 71: USART/LPUART characteristics. Table 89. Document revision history Date Revision Changes |
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