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PC87366 Scheda tecnica(PDF) 212 Page - National Semiconductor (TI) |
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PC87366 Scheda tecnica(HTML) 212 Page - National Semiconductor (TI) |
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212 / 240 page ![]() 13.0 Legacy Functional Blocks (Continued) 212 www.national.com 13.2.3 FDC Bitmap Summary The FDC supports two system operation modes: PC-AT mode and PS/2 mode (MicroChannel systems). Unless specifically indicated otherwise, all fields in all registers are valid in both drive modes. Register Bits Offset Mnemonic 76543210 00h SRANote 1. Note 1. Applicable only in PS/2 Mode IRQ Pending Reserved Step TRK0 Head Se- lect INDEX WP Head Direction 01h SRBNote 1. Reserved Drive Select 0 Status WDATA RDATA WGATE MTR1 MTR0 02h DOR Motor Enable 3 Motor Enable 2 Motor Enable 1 Motor Enable 0 DMAEN Reset Controller Drive Select 03h TDR Reserved Tape Drive Select 1,0 TDRNote 2. Note 2. Applicable only in Enhanced TDR Mode Reserved Drive ID Information Logical Drive Exchange Tape Drive Select 1,0 04h MSR RQM Data I/O Direction Non-DMA Execution Command in Progress Drive 3 Busy Drive 2 Busy Drive 1 Busy Drive 0 Busy DSR Software Reset Low Power Reserved Precompensation Delay Select Data Transfer Rate Select 05h FIFO Data Bits 07h DIRNote 3. Note 3. Applicable only in PC-AT Compatible Mode DSKCHG Reserved DIRNote 1. DSKCHG Reserved DRATE 1,0 Status High Density 07h CCR Reserved DRATE1,0 |
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