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HMN12816D Scheda tecnica (PDF) - List of Unclassifed Manufacturers

HMN12816D Datasheet PDF - List of Unclassifed Manufacturers
Il numero della parte HMN12816D
Scarica  HMN12816D Scarica
Grandezza file   143.7 Kbytes
Page   9 Pages
Produttore elettronici  ETC [List of Unclassifed Manufacturers]
Homepage  
Logo ETC - List of Unclassifed Manufacturers
Spiegazioni elettronici Non-Volatile SRAM MODULE 2Mbit (128K x 16-Bit), 40pin-Dip, 5V

HMN12816D Datasheet (PDF)

Go To PDF Page Scarica Scheda tecnica
HMN12816D Datasheet PDF - List of Unclassifed Manufacturers

Il numero della parte HMN12816D
Scarica  HMN12816D Click to download

Grandezza file   143.7 Kbytes
Page   9 Pages
Produttore elettronici  ETC [List of Unclassifed Manufacturers]
Homepage  
Logo ETC - List of Unclassifed Manufacturers
Spiegazioni elettronici Non-Volatile SRAM MODULE 2Mbit (128K x 16-Bit), 40pin-Dip, 5V

HMN12816D Scheda tecnica (HTML) - List of Unclassifed Manufacturers


HMN12816D Dettagli del prodotto

GENERAL DESCRIPTION

The HMN12816D 128K x 16 nonvolatile SRAM’s are 2,097,152-bit fully static, nonvolatile SRAM’s, organized as 131,072 words by 16 bits. Each NVSRAM has a self contained lithium energy source and control circuitry which constantly monitors Vcc for an out-of-tolerance condition. When such a condition occurs, the lithium energy source is automatically switched on and write protection is unconditionally enabled to prevent data corruption. DIP-package HMN12816D devices can be used in place of solutions which build nonvolatile 128Kx16 memory by utilizing a variety of discrete components. There is no limit on the number of write cycles that can be executed and no additional support circuitry is required for microprocessor interfacing.



FEATURES

Access time : 70, 85, 120, 150ns

High-density design : 256KByte Design

Battery internally isolated until power is applied

Industry-standard 40-pin 128K x 16 pinout

Unlimited write cycles

Data retention in the absence of VCC

10-years minimum data retention in absence of power

Automatic write-protection during power-up/power-down cycles

Data is automatically protected during power loss

Conventional SRAM operation; unlimited write cycles




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