Features
■ 32-bit RXv2 CPU core
• Max. operating frequency: 54 MHz
Capable of 88.56 DMIPS in operation at 54 MHz
• Enhanced DSP: 32-bit multiply-accumulate and 16-bit
multiply-subtract instructions supported
• Built-in FPU: 32-bit single-precision floating point (compliant to
IEEE754)
• Divider (fastest instruction execution takes two CPU clock cycles)
• Fast interrupt
• CISC Harvard architecture with 5-stage pipeline
• Variable-length instructions, ultra-compact code
• On-chip debugging circuit
• Memory protection unit (MPU) supported
■ Low power design and architecture
• Operation from a single 1.8-V to 5.5-V supply
• RTC capable of operating on the battery backup power supply
• Three low power consumption modes
• Low power timer (LPT) that operates during the software standby state
■ On-chip flash memory for code
• 128- to 512-Kbyte capacities
• On-board or off-board user programming
• Programmable at 1.8 V
• For instructions and operands
■ On-chip data flash memory
• 8 Kbytes (1,000,000 program/erase cycles (typ.))
• BGO (Background Operation)
■ On-chip SRAM, no wait states
• 32- to 64-Kbyte size capacities
■ Data transfer functions
• DMAC: Incorporates four channels
• DTC: Four transfer modes
■ ELC
• Module operation can be initiated by event signals without using
interrupts.
• Linked operation between modules is possible while the CPU is sleeping.
■ Reset and supply management
• Eight types of reset, including the power-on reset (POR)
• Low voltage detection (LVD) with voltage settings
■ Clock functions
• Main clock oscillator frequency: 1 to 20 MHz
• External clock input frequency: Up to 20 MHz
• Sub-clock oscillator frequency: 32.768 kHz
• PLL circuit input: 4 MHz to 12.5 MHz
• On-chip low- and high-speed oscillators, dedicated on-chip low-speed
oscillator for the IWDT
• USB-dedicated PLL circuit: 4, 6, 8, or 12 MHz
54 MHz can be set for the system clock and 48 MHz for the USB clock
• Generation of a dedicated 32.768-kHz clock for the RTC
• Clock frequency accuracy measurement circuit (CAC)
■ Realtime clock
• Adjustment functions (30 seconds, leap year, and error)
• Calendar count mode or binary count mode selectable
• Time capture function
• Time capture on event-signal input through external pins
■ Independent watchdog timer
• 15-kHz on-chip oscillator produces a dedicated clock signal to drive
IWDT operation.
■ Useful functions for IEC60730 compliance
• Self-diagnostic and disconnection-detection assistance functions for
the A/D converter, clock frequency accuracy measurement circuit,
independent watchdog timer, RAM test assistance functions using the
DOC, etc.
■ External address space
• Four CS areas (4 × 16 Mbytes)
• 8- or 16-bit bus space is selectable per area
■ MPC
• Input/output functions selectable from multiple pins