GENERAL DESCRIPTION
The MX25L1602 is a CMOS 16,777,216 bit serial Flash EEPROM, which is configured as 2,097,152 x 8 internally. The MX25L1602 features a serial peripheral interface and software protocol allowing operation on a simple 3- wire bus. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). SPI access to the device is enabled by CS input.
The MX25L1602 provide sequential read operation on whole chip. The sequential read operation is executed on a segment (512 byte) basis. User may start to read from any byte of the segment. While the end of the segment is reached, the device will wrap around to the beginning of the segment and continuously outputs data until CS goes high. After program/erase command is issued, auto program/ erase algorithms which program/erase and verify the specified page locations will be executed. Program command is executed on a page (128 bytes) basis, and erase command is executed on both chip and sector (8K bytes) basis.
To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read command can be issued to detect completion and error flag status of a program or erase operation.
When the device is not in operation and CS is high, it is put in standby mode and draws less than 30uA DC current.
The MX25L1602 utilizes MXICs proprietary memory cell which reliably stores memory contents even after 100,000 program and erase cycles.

FEATURES
GENERAL
• 16,777,216 x 1 bit structure
• 256 Equal Sectors with 8K-byte each
   - Any sector can be erased
• 4096 Equal Segments with 512-byte each
   - Provides sequential output within any segment
• Single Power Supply Operation
   - 3.0 to 3.6 volt for read, erase, and program operations
• Latch-up protected to 100mA from -1V to Vcc +1V
• Low Vcc write inhibit is equal to or less than 2.5V

PERFORMANCE
• High Performance
   - Fast access time: 20MHz serial clock (50pF + 1TTL Load)
   - Fast program time: 5ms/page (typical, 128-byte per page)
   - Fast erase time: 300ms/sector (typical, 8K-byte per sector)
• Low Power Consumption
   - Low active read current: 10mA (typical) at 17MHz
   - Low active programming current: 10mA (typical)
   - Low active erase current: 10mA (typical)
   - Low standby current: 30uA (typical, CMOS)
• Minimum 100,000 erase/program cycle

SOFTWARE FEATURES
• Input Data Format
   - 1-byte Command code, 3-byte address, 1-byte byte address
• 512-byte Sequential Read Operation
• Built in 9-bit (A0 to A8) pre-settable address counter to
   support the 512-byte sequential read operation
• Auto Erase and Auto Program Algorithm
   - Automatically erases and verifies data at selected sector
   - Automatically programs and verifies data at selected
      page by an internal algroithm that automatically times
      the program pulse widths (Any page to be programed
      should have page in the erased state first)
• Status Register Feature
   - Provides detection of program and erase operation completion.
   - Provides auto erase/ program error report

HARDWARE FEATURES
• SCLK Input
   - Serial clock input
• SI Input
   - Serial Data Input
• SO Output
   - Serial Data Output
• PACKAGE
   - 28-pin SOP (330mil)