Functional Description
• Quad Bus Buffer, Non-Inverted 3-State Outputs
74HC125D: Quad Bus Buffer
74HC126D: Quad Bus Buffer
General
The 74HC125D,74HC126D are high speed CMOS QUAD BUS BUFFERs fabricated with silicon gate C2MOS
technology.
They achieve the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power
dissipation.
The 74HC125D requires the 3-state control input G to be set high to place the output into the high impedance
state, whereas the 74HC126D requires the control input to be set low to place the output into high impedance.
All inputs are equipped with protection circuits against static discharge or transient excess voltage.
Features
(1) High speed: tpd = 10 ns (typ.) at VCC = 6.0 V
(2) Low power dissipation: ICC = 4.0 μA (max) at Ta = 25 
(3) Balanced propagation delays: tPLH ≈ tPHL
(4) Wide operating voltage range: VCC(opr) = 2.0 to 6.0 V