OVERVIEW
The BCM5704C is a fully integrated dual-port, 10/100/1000BASE-T Gigabit Ethernet (GbE) MAC and physical layer transceiver solution for high-performance network applications. The BCM5704C is a highly integrated solution combining two triple-speed, IEEE 802.3-compliant MACs, PCI, and PCI-X bus interfaces, an on-chip buffer memory, and an integrated physical layer transceiver in a single device. The BCM5704C is fabricated in a low-voltage, 0.13 µm CMOS process providing a low-power system solution. By itself, the BCM5704C provides a complete single-chip dual-port GbE NIC or LOM solution.

FEATURES
• Single-chip, dual-port solution for dual LAN on Motherboard (LOM) and network interface card (NIC) applications
    • Two integrated 10BASE-T/100BASE-TX/1000BASE-T transceivers
    • Two 10/100/1000 triple-speed MACs
    • Single host interface
        - PCI v2.2 32/64-bit, 33/66 MHz
        - PCI-X v1.0 64-bit, 66/100/133 MHz
    • Dual ultradeep 64 KB on-chip packet buffer
    • Dual high-speed RISC cores with 16 KB caches
        - Programmable, in-line packet classification
    • SMBus 2.0 controller
    • On-chip power circuit controller and Wake-on-LAN (WOL) power switching circuit
• Performance features
    • TCP, IP, UDP checksum
    • TCP segmentation
    • CPU task offload
    • Adaptive interrupts
    • Ultradeep 64 KB packet buffer
• Robust manageability
    • PXE 2.0 remote boot
    • Alert Standard Format: ASF 1.0 support
    • WOL
    • Out-of-box WOL
    • Intelligent Platform Management Interface (IPMI), ver. 1.5
    • Statistic gathering (SNMP MIB II, Ethernet-like MIB, Ethernet MIB)
    • Comprehensive diagnostic and configuration software suite
    • ACPI 1.1a-compliant (multiple power modes)
• Advanced network features
    • Priority queuing: 802.1p Layer 2 priority encoding; support for four priority queues
    • Virtual LANs: 802.1q VLAN tagging; support for up to 64 VLANs
    • Jumbo frames (9 KB)
    • IEEE 802.3x flow control
• Advanced server features
    • Link aggregation: IEEE 802.3ad, GEC/FEC, Smart Load Balancing (supports heterogeneous teams)
    • Heterogeneous, mixed speed failover
    • Hot-Plug PCI support
• Low-power, 0.13 µm CMOS design
• 300-pin HBGA package
• 3.3V I/Os (5V tolerant)
• JTAG