Features
 High Performance PCI Express Switch
– Four 2.5 Gbps PCI Express lanes
– Four switch ports
– x1 Upstream port
– Three x1 Downstream ports
– Low latency cut-through switch architecture
– Support for Max payload sizes up to 256 bytes
– One virtual channel
– Eight traffic classes
– PCI Express Base Specification Revision 1.1 compliant
 Flexible Architecture with Numerous Configuration Options
– Automatic lane reversal on all ports
– Automatic polarity inversion on all lanes
– Ability to load device configuration from serial EEPROM
 Legacy Support
– PCI compatible INTx emulation
– Bus locking
 Highly Integrated Solution
– Requires no external components
– Incorporates on-chip internal memory for packet buffering and
queueing
– Integrates four 2.5 Gbps embedded SerDes with 8B/10B
encoder/decoder (no separate transceivers needed)
 Reliability, Availability, and Serviceability (RAS) Features
– Internal end-to-end parity protection on all TLPs ensures data
integrity even in systems that do not implement end-to-end
CRC (ECRC)
– Supports ECRC and Advanced Error Reporting
– Supports PCI Express Native Hot-Plug, Hot-Swap capable I/O
– Compatible with Hot-Plug I/O expanders used on PC motherboards
 Power Management
– Utilizes advanced low-power design techniques to achieve low
typical power consumption
– Supports PCI Power Management Interface specification (PCIPM
1.2)
– Unused SerDes are disabled.
– Supports Advanced Configuration and Power Interface Specification,
Revision 2.0 (ACPI) supporting active link state
 Testability and Debug Features
– Built in Pseudo-Random Bit Stream (PRBS) generator
– Numerous SerDes test modes
– Ability to bypass link training and force any link into any mode
– Provides statistics and performance counters