Features
• Three differential LVDS output pairs
• One differential clock input
• CLK, nCLK can accept the following differential input levels:
LVPECL, LVDS, HCSL
• Input frequency range: 98MHz to 128MHz
• Output frequency range: 98MHz to 320MHz
• VCO range: 490MHz - 640MHz
• Cycle-to-Cycle jitter: 30ps (maximum)
• 3MHz PLL loop bandwidth
• 0°C to 70°C ambient operating temperature
• Full 3.3V operating supply
• Lead-free (RoHS 6) packaging
• For drop-in replacement use 874003AG-02