Features
• RapidIO ports
— 48 bidirectional S-RIO lanes
— Port widths of 1x, 2x, and 4x allow up to 20 Gbps per port
— Port speeds selectable: 6.25, 5, 3.125, 2.5, or 1.25 Gbaud
— Support Level I defined short or long haul reach, and Level II
defined short-, medium-, or long-run reach for each PHY speed
— Error Management Extensions support
— Software-assisted error recovery, supporting hot swap
• I2C Interfaces
— Provides I2C port for maintenance and error reporting
— Master or Slave operation
— Master allows power-on configuration from external ROM
— Master mode configuration with external image compressing and
checksum
• Switch
— 240 Gbps peak throughput
— Non-blocking data flow architecture
— Configurable for Cut-Through or Store-and-Forward data flow
— Very low latency for all packet lengths and load conditions
— Internal queuing buffer and retransmit buffer
— Standard transmitter- or receiver-controlled flow control
— Global routing or Local Port routing capability
— Supports up to 40 simultaneous multicast masks, with broadcast
— Performance monitoring counters for performance and
diagnostics analysis. Per input port and output port counters