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74AVC4TD245 Scheda tecnica (PDF) - Nexperia B.V. All rights reserved

74AVC4TD245 Datasheet PDF - Nexperia B.V. All rights reserved
Il numero della parte 74AVC4TD245
Scarica  74AVC4TD245 Scarica
Grandezza file   280.51 Kbytes
Page   24 Pages
Produttore elettronici  NEXPERIA [Nexperia B.V. All rights reserved]
Homepage  https://www.nexperia.com/
Logo NEXPERIA - Nexperia B.V. All rights reserved
Spiegazioni elettronici 4-bit dual supply translating transceiver with configurable voltage translation; 3-state

74AVC4TD245 Datasheet (PDF)

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74AVC4TD245 Datasheet PDF - Nexperia B.V. All rights reserved

Il numero della parte 74AVC4TD245
Scarica  74AVC4TD245 Click to download

Grandezza file   280.51 Kbytes
Page   24 Pages
Produttore elettronici  NEXPERIA [Nexperia B.V. All rights reserved]
Homepage  https://www.nexperia.com/
Logo NEXPERIA - Nexperia B.V. All rights reserved
Spiegazioni elettronici 4-bit dual supply translating transceiver with configurable voltage translation; 3-state

74AVC4TD245 Scheda tecnica (HTML) - Nexperia B.V. All rights reserved


74AVC4TD245 Dettagli del prodotto

1 General description
The 74AVC4TD245 is a 4-bit, dual supply transceiver that enables bidirectional level
translation. It features eight 1-bit input-output ports (An and Bn), four direction control
inputs (DIR1, DIR2, DIR3 and DIR4), an output enable input (OE) and dual supply pins
(VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between
0.8 V and 3.6 V making the device suitable for translating between any of the low voltage
nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins An, OE and DIRn are referenced
to VCC(A) and pins Bn are referenced to VCC(B). A HIGH on DIRn allows transmission from
An to Bn and a LOW on DIRn allows transmission from Bn to An. The output enable input
(OE) can be used to disable the outputs so the buses are effectively isolated.
The device is fully specified for partial power-down applications using IOFF. The IOFF
circuitry disables the output, preventing any damaging backflow current through the
device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at
GND level, both An and Bn are in the high-impedance OFF-state.
2 Features and benefits
• Wide supply voltage range:
– VCC(A): 0.8 V to 3.6 V
– VCC(B): 0.8 V to 3.6 V
• Complies with JEDEC standards:
– JESD8-12 (0.8 V to 1.3 V)
– JESD8-11 (0.9 V to 1.65 V)
– JESD8-7 (1.2 V to 1.95 V)
– JESD8-5 (1.8 V to 2.7 V)
– JESD8-B (2.7 V to 3.6 V)
• ESD protection:
– HBM JESD22-A114E Class 3B exceeds 8000 V
– MM JESD22-A115-A exceeds 200 V
– CDM JESD22-C101C exceeds 1000 V
• Maximum data rates:
– 380 Mbit/s (≥ 1.8 V to 3.3 V translation)
– 200 Mbit/s (≥ 1.1 V to 3.3 V translation)
– 200 Mbit/s (≥ 1.1 V to 2.5 V translation)
– 200 Mbit/s (≥ 1.1 V to 1.8 V translation)
– 150 Mbit/s (≥ 1.1 V to 1.5 V translation)
– 100 Mbit/s (≥ 1.1 V to 1.2 V translation)
• Suspend mode
• Latch-up performance exceeds 100 mA per JESD 78 Class II
• Inputs accept voltages up to 3.6 V
• IOFF circuitry provides partial Power-down mode operation
• Multiple package options
• Specified from -40 °C to +85 °C and -40 °C to +125 °C




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