1. General description
The 74AHC573-Q100; 74AHCT573-Q100 is an 8-bit D-type transparent latch with 3-state outputs.
The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at
the inputs enter the latches. In this condition the latches are transparent, a latch output will change
each time its corresponding D-input changes. When LE is LOW the latches store the information
that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH
on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does
not affect the state of the latches. Inputs are overvoltage tolerant. This feature allows the use of
these devices as translators in mixed voltage environments.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100
(Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
• Automotive product qualification in accordance with AEC-Q100 (Grade 1)
• Specified from -40 °C to +85 °C and from -40 °C to +125 °C
• Wide supply voltage range from 2.0 V to 5.5 V
• Balanced propagation delays
• All inputs have Schmitt-trigger action
• Overvoltage tolerant inputs to 5.5 V
• High noise immunity
• CMOS low power dissipation
• Common 3-state output enable input
• Input levels:
• For 74AHC573-Q100: CMOS input level
• For 74AHCT573-Q100: TTL input level
• ESD protection:
• MIL-STD-883, method 3015 exceeds 2000 V
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0 Ω)
• Latch-up performance exceeds 100 mA per JESD 78 Class II Level A
• Multiple package options
• DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of
solder joints