FEATURES GENERAL DESCRIPTION
 Compliant with DisplayPort Specification version 1.2a
and Embedded DisplayPort (eDP) Specification version
1.3
 Up to 4 Main Link Lanes at either 1.62Gb/s or 2.7Gb/s
(HBR) link rate supported
 Support color depth 6/8/10/12bits
 HDMI transmitter compliant with HDMI specification
version 1.4b and DVI specification version 1.0
 HDMI transmitter supports up to 300 MHz TMDS
clock, and supports up to 3.0Gbps data rate for video
timing of 1920x1080@120Hz or 4Kx2K@30Hz
 Supports Enhanced Framing Mode
 Fast and full Link Training for embedded DisplayPort
system
 Support eDP Authentication: Alternative Scramble Seed
Reset and Alternative Framing
 DisplayPort receiver auto equalization supported for the
compensation of input signal attenuation
 Support Spread Spectrum Clocking (de-spreading) for
EMI reduction
 HDCP engine compliant with HDCP 1.4 specification
with internal HDCP Keys
 On-chip Audio Decoder which support 8 channel Audio
input from DP Rx and output from HDMI Tx with
sample rate up to 192KHz
 Embedded MCU to handle the control logic
 Support device boot up by loading firmware from On
Chip Flash automatically
 Integrated EDID Buffer
 2 work modes: connect 27MHz crystal, inject 27MHz
clock
 DP input detection supported
 Support Auto Power Saving mode and low stand-by
current
 DP AUX channel and IIC slave interface are available
for firmware update and debug
 Low power architecture
 RoHS compliant and Halogen free package
 HBM 4KV ESD Performance
 Offered in 48-Pin QFN package (6 x 6 mm)
APPLICATION
 Notbook/Ultrabook
 Tablet Device
 Handheld/Portable Device
 DP to HDMI cable
 DP to HDMI Adapter/Docking Station
Chrontel’s CH7525 is a low-cost, low-power
semiconductor device that translates the DisplayPort
signal to HDMI/DVI. This innovative DisplayPort
receiver with an integrated HDMI Transmitter is specially
designed to target the notebook/ultrabook, tablet device
and PC market segments. Through the CH7525’s
advanced decoding / encoding algorithm, the input
DisplayPort high-speed serialized multimedia data can be
seamlessly converted to HDMI/DVI output.
The CH7525’s DP/eDP receiver is compliant with the
DisplayPort Specification 1.2a and the Embedded
DisplayPort Specification version 1.3. With internal
HDCP key Integrated, the device support HDCP 1.4
specifications. In the device’s receiver block, which
supports four DisplayPort Main Link Lanes input with
data rate running at either 1.62Gb/s or 2.7Gb/s, can accept
RGB digital formats in either 18 bit or 24-bit, and
converted the input signal to HDMI output up to
1920x1080@120Hz or 3840x2160@30Hz. Leveraging
the DisplayPort’s unique source/sink “Link Training”
routine, the CH7525 is capable of instantly bring up the
video display to the HDMI/DVI TV/Monitor when the
initialization process is completed.
The CH7525 also supports up to 8-channel audio input
from DP Rx and output from HDMI Tx with sample rate
up to 192 KHz. Available audio bandwidth depends on
the pixel clock frequency, the video format timing, and
whether or not content protection re-synchronization is
needed.
With sophisticated MCU and the On Chip Flash, CH7525
support auto-boot and EDID buffer. Leveraging the
firmware auto-loaded from Flash, CH7525 can support
DP input detection and determine to enter into Power
saving mode automatically.