1 Features
• LP-HCSL clock buffer that support:
– PCIe Gen 1 to Gen 6
– CC (Common Clock) and IR (Independent
Reference) PCIe architectures
– Input clock with or without SSC
• DB2000QL compliant:
– All devices meet DB2000QL specifications
– LMKDB1120 is pin-compatible to DB2000QL
• Extremely low additive jitter:
– 31 fs maximum 12 kHz to 20 MHz RMS
additive jitter at 156.25 MHz
– 13 fs maximum additive jitter for PCIe Gen 4
– 5 fs maximum additive jitter for PCIe Gen 5
– 3 fs maximum additive jitter for PCIe Gen 6
• Fail-safe input
• Flexible power-up sequence
• Automatic output disable
• Individual output enable
• SBI (Side Band Interface) for high-speed output
enable or disable
• LOS (Loss of Signal) input detection
• 85 Ω or 100 Ω output impedance
• 1.8 V / 3.3 V ± 10% power supply
• –40°C to 105°C ambient temperature

2 Applications
• High Performance Computing
• Server Motherboard
• NIC/SmartNIC
• Hardware Accelerator

3 Description
LMKDB1120 and LMKDB1108 are extremely-low-jitter
LP-HCSL buffers that support PCIe Gen 1 to
Gen 6 and are DB2000QL compliant. The devices
provide flexible power-up sequence, fail-safe inputs,
individual output enable and disable pins, loss of input
signal (LOS) detection and automatic output disable
features, as well as excellent power supply noise
rejection performance.
Both 1.8-V and 3.3-V supply voltages are supported.
For LMKDB1120, 1.8-V power supply saves 250 mW
power compared to 3.3 V.