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MH16S72PHC-7 Scheda tecnica (PDF) - Mitsubishi Electric Semiconductor

MH16S72PHC-7 Datasheet PDF - Mitsubishi Electric Semiconductor
Il numero della parte MH16S72PHC-7
Scarica  MH16S72PHC-7 Scarica
Grandezza file   591.85 Kbytes
Page   55 Pages
Produttore elettronici  MITSUBISHI [Mitsubishi Electric Semiconductor]
Homepage  http://www.mitsubishichips.com
Logo MITSUBISHI - Mitsubishi Electric Semiconductor
Spiegazioni elettronici 1207959552-BIT (16777216 - WORD BY 72-BIT)SynchronousDRAM

MH16S72PHC-7 Datasheet (PDF)

Go To PDF Page Scarica Scheda tecnica
MH16S72PHC-7 Datasheet PDF - Mitsubishi Electric Semiconductor

Il numero della parte MH16S72PHC-7
Scarica  MH16S72PHC-7 Click to download

Grandezza file   591.85 Kbytes
Page   55 Pages
Produttore elettronici  MITSUBISHI [Mitsubishi Electric Semiconductor]
Homepage  http://www.mitsubishichips.com
Logo MITSUBISHI - Mitsubishi Electric Semiconductor
Spiegazioni elettronici 1207959552-BIT (16777216 - WORD BY 72-BIT)SynchronousDRAM

MH16S72PHC-7 Scheda tecnica (HTML) - Mitsubishi Electric Semiconductor


MH16S72PHC-7 Dettagli del prodotto

DESCRIPTION
The MH16S72PHC is 16777216 - word by 72-bit Synchronous DRAM module. This consists of ten industry standard 8Mx16 Synchronous DRAMs in TSOP and one industory standard EEPROM in TSSOP.
The mounting of TSOP on a card edge Dual Inline package provides any application where high densities and large quantities of memory are required.
This is a socket type - memory modules, suitable for easy interchange or addition of modules.

FEATURES
• Utilizes industry standard 8M x 16 Synchronous DRAMs TSOP and industry standard EEPROM in TSSOP
• 168-pin (84-pin dual in-line package)
• single 3.3V±0.3V power supply
• Clock frequency 100MHz
• Fully synchronous operation referenced to clock rising edge
• 4 bank operation controlled by BA0,1(Bank Address)
• Burst length- 1/2/4/8/Full Page(programmable)
• Burst type- sequential / interleave(programmable)
• /CAS latency- 2/3(programmable)
• Column access - random
• Auto precharge / All bank precharge controlled by A10
• Auto refresh and Self refresh
• 4096 refresh cycle /64ms
• LVTTL Interface
• Discrete IC and module design conform to PC100 specification.
   (module Spec. Rev. 1.0 and SPD 1.2A(-7,-8), SPD 1.0(-10))

APPLICATION
   PC main memory




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