▪ 32-bit internal data bus
▪ General-purpose register architecture: 16
32-bit general general-purpose registers
− Register bank for fast interrupt
response (15 banks)
▪ RISC type instruction set: Instruction length:
16 bits / 32 bits mixed, 16-bit basic
instruction for improving code efficiency, 32-
bit instruction for improving performance and usability
▪ Two instructions simultaneous execution superscalar