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TLV5613CDW Scheda tecnica (PDF) - Texas Instruments

TLV5613CDW Datasheet PDF - Texas Instruments
Il numero della parte TLV5613CDW
Scarica  TLV5613CDW Scarica
Grandezza file   362.64 Kbytes
Page   22 Pages
Produttore elettronici  TI2 [Texas Instruments]
Homepage  https://www.ti.com
Logo TI2 - Texas Instruments
Spiegazioni elettronici 2.7 V TO 5.5 V 12-BIT PARALLEL DIGITAL-TO-ANALOG CONVERTER WITH POWER DOWN

TLV5613CDW Datasheet (PDF)

Go To PDF Page Scarica Scheda tecnica
TLV5613CDW Datasheet PDF - Texas Instruments

Il numero della parte TLV5613CDW
Scarica  TLV5613CDW Click to download

Grandezza file   362.64 Kbytes
Page   22 Pages
Produttore elettronici  TI2 [Texas Instruments]
Homepage  https://www.ti.com
Logo TI2 - Texas Instruments
Spiegazioni elettronici 2.7 V TO 5.5 V 12-BIT PARALLEL DIGITAL-TO-ANALOG CONVERTER WITH POWER DOWN

TLV5613CDW Scheda tecnica (HTML) - Texas Instruments


TLV5613CDW Dettagli del prodotto

12-Bit Voltage Output DAC
Single Supply 2.7-V to 5.5-V Operation
Separate Analog and Digital Supplies
±0.4 LSB Differential Nonlinearity (DNL),
±1.5 LSB Integral Nonlinearity (INL)
Programmable Settling Time vs Power
Consumption:
1 μs/4.2 mW in Fast Mode,
3.5 μs/1.2 mW in Slow Mode
8-Bit μController Compatible Interface (8+4
Bit)
Power-Down Mode (50 nW)
Rail-to-Rail Output Buffer
Synchronous or Asynchronous Update
Monotonic Over Temperature

applications
Digital Servo Control Loops
Battery Powered Test Instruments
Digital Offset and Gain Adjustment
Industrial Process Control
Speech Synthesis
Machine and Motion Control Devices
Mass Storage Devices

description
The TLV5613 is a 12-bit voltage output
digital-to-analog converter (DAC) with a 8-bit
microcontroller compatible parallel interface. The
8 LSBs, the 4 MSBs and 3 control bits are written
using three different addresses. Developed for a
wide range of supply voltages, the TLV5613 can
be operated from 2.7 V to 5.5 V.
The resistor string output voltage is buffered by a x2 gain rail-to-rail output buffer. The buffer features a Class A
(slow mode: AB) output stage to improve stability and reduce settling time. The programmable settling time of
the DAC allows the designer to optimize speed versus power dissipation. The settling time can be chosen by
the control bits within the 16-bit data word.
Implemented with a CMOS process, the device is designed for single supply operation from 2.7 V to 5.5 V. It
is available in 20 pin SOIC in standard commercial and industrial temperature ranges.




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