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SN74AVC16834 Scheda tecnica (PDF) - Texas Instruments

SN74AVC16834 Datasheet PDF - Texas Instruments
Il numero della parte SN74AVC16834
Scarica  SN74AVC16834 Scarica
Grandezza file   1017.54 Kbytes
Page   22 Pages
Produttore elettronici  TI2 [Texas Instruments]
Homepage  https://www.ti.com
Logo TI2 - Texas Instruments
Spiegazioni elettronici 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS

SN74AVC16834 Datasheet (PDF)

Go To PDF Page Scarica Scheda tecnica
SN74AVC16834 Datasheet PDF - Texas Instruments

Il numero della parte SN74AVC16834
Scarica  SN74AVC16834 Click to download

Grandezza file   1017.54 Kbytes
Page   22 Pages
Produttore elettronici  TI2 [Texas Instruments]
Homepage  https://www.ti.com
Logo TI2 - Texas Instruments
Spiegazioni elettronici 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS

SN74AVC16834 Scheda tecnica (HTML) - Texas Instruments


SN74AVC16834 Dettagli del prodotto

FEATURES
· Member of the Texas Instruments Widebus™
Family
· DOC™ (Dynamic Output Control) Circuit
Dynamically Changes Output Impedance,
Resulting in Noise Reduction Without Speed
Degradation
· Dynamic Drive Capability Is Equivalent to
Standard Outputs With IOH and IOL of ±24 mA
at 2.5-V VCC
· Overvoltage-Tolerant Inputs/Outputs Allow
Mixed-Voltage-Mode Data Communications
· Ioff Supports Partial-Power-Down Mode
Operation
· ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
· Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II

DESCRIPTION/ORDERING INFORMATION
A Dynamic Output Control (DOC™) circuit is implemented, which, during the transition, initially lowers the output
impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1 shows
typical VOL vs IOL and VOH vs IOH curves to illustrate the output impedance and drive capability of the circuit. At
the beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is equivalent to a
high-drive standard-output device. For more information, refer to the TI application reports, AVC Logic Family
Technology and Applications, literature number SCEA006, and Dynamic Output Control (DOC™) Circuitry
Technology and Applications, literature number SCEA009.
This 18-bit universal bus driver is operational at 1.2-V to 3.6-V VCC, but is designed specifically for 1.65-V to
3.6-V VCC operation.
Data flow from A to Y is controlled by the output-enable (OE) input. The device operates in the transparent mode
when the latch-enable (LE) input is low. The A data is latched if the clock (CLK) input is held at a high or low
logic level. If LE is high, the A data is stored in the latch/flip-flop on the low-to-high transition of CLK. When OE is
high, the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.




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