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L74VHC1GT05 Scheda tecnica (PDF) - Leshan Radio Company

L74VHC1GT05 Datasheet PDF - Leshan Radio Company
Il numero della parte L74VHC1GT05
Scarica  L74VHC1GT05 Scarica
Grandezza file   228.94 Kbytes
Page   6 Pages
Produttore elettronici  LRC [Leshan Radio Company]
Homepage  http://www.lrc.cn/
Logo LRC - Leshan Radio Company
Spiegazioni elettronici Inverter with Open DrainOutput with LSTTL-Compatible Inputs

L74VHC1GT05 Datasheet (PDF)

Go To PDF Page Scarica Scheda tecnica
L74VHC1GT05 Datasheet PDF - Leshan Radio Company

Il numero della parte L74VHC1GT05
Scarica  L74VHC1GT05 Click to download

Grandezza file   228.94 Kbytes
Page   6 Pages
Produttore elettronici  LRC [Leshan Radio Company]
Homepage  http://www.lrc.cn/
Logo LRC - Leshan Radio Company
Spiegazioni elettronici Inverter with Open DrainOutput with LSTTL-Compatible Inputs

L74VHC1GT05 Scheda tecnica (HTML) - Leshan Radio Company


L74VHC1GT05 Dettagli del prodotto

The L74VHC1GT05 is an advanced high speed CMOS inverter with open drain output fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including an open drain output which provides the ability to set output switching level. This allows the L74VHC1GT05 to be used to interface 5 V circuits to circuits of any voltage between V CC and 7 V using an external resistor and power supply.
The device input is compatible with TTL–type input thresholds and the output has a full 5.0 V CMOS level output swing. The input protection circuitry on this device allows overvoltage tolerance on the input, allowing the device to be used as a logic–level translator from 3.0 V CMOS logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to 3.0 V CMOS Logic while operating at the high–voltage power supply.
The L74VHC1GT05 input structure provides protection when voltages up to 7 V are applied, regardless of the supply voltage. This allows the L74VHC1GT05 to be used to interface 5 V circuits to 3 V circuits. The output structures also provide protection when V CC = 0 V. These input and output structures help prevent device destruction caused by supply voltage – input/output voltage mismatch, battery backup, hot insertion, etc.

• High Speed: t PD = 3.8 ns (Typ) at V CC = 5 V
• Low Internal Power Dissipation: I CC = 2 mA (Max) at T A= 25°C
• Power Down Protection Provided on Inputs
• Pin and Function Compatible with Other Standard Logic Families
• Chip Complexity: FET = 105; Equivalent Gate = 26




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