Features
• High-speed, high-voltage silicon gate CMOS device.
• Contains high-speed shiftable (5MHz max) 32-bit shift register, 32-bit latch, output driver on/off control circuit, 32-bit N-channel open drain output driver.
• Serial shift data is shifted on the positive transition of the clock (CLOCK).
• 32-bit latch data is changed on the negative transition of the LATCH pad and is held on the positive transition.
• The STROBE pad, BEO pad can be used to exercise on/off control of the output driver.
• Complete separation of logic circuit GND (1 pad) and thermal driver GND (4 pads).
• Maximum ratings of driver output: VO = 28V, IOL = 30mA.
• Logic unit operating voltage: VDD = 4.5 to 5.5V.