Features
■ Core: ARM® Cortex®-M4 32-bit CPU with 72 MHz FPU, single-cycle multiplication and HW division, DSP instruction and MPU (memory protection unit)
■ Operating conditions: – VDD, VDDA voltage range: 2.0 V to 3.6 V
■ Memories – Up to 512 Kbytes of Flash memory – 64 Kbytes of SRAM, with HW parity check implemented on the first 32 Kbytes. – Flexible memory controller (FSMC) for static memories, with four Chip Select
■ CRC calculation unit
■ Reset and supply management – Power-on/Power-down reset (POR/PDR) – Programmable voltage detector (PVD) – Low-power modes: Sleep, Stop and Standby – VBAT supply for RTC and backup registers
■ Clock management – 4 to 32 MHz crystal oscillator – 32 kHz oscillator for RTC with calibration – Internal 8 MHz RC with x 16 PLL option – Internal 40 kHz oscillator
■ Up to 115 fast I/Os – All mappable on external interrupt vectors – Several 5 V-tolerant
■ Interconnect matrix
■ 12-channel DMA controller
■ Two ADCs 0.20 µs (up to 18 channels) with selectable resolution of 12/10/8/6 bits, 0 to 3.6 V conversion range, separate analog supply from 2.0 to 3.6 V
■ One 12-bit DAC channels with analog supply from 2.4 to 3.6 V
■ Four ultra-fast rail-to-rail analog comparators with analog supply from 2.0 to 3.6 V
■ Two operational amplifiers that can be used in PGA mode, all terminals accessible with analog supply from 2.4 to 3.6 V
■ Up to 24 capacitive sensing channels supporting touchkey, linear and rotary touch sensors
■ Up to 11 timers: – One 32-bit timer and two 16-bit timers with up to four IC/OC/PWM or pulse counter and quadrature (incremental) encoder input – One 16-bit 6-channel advanced-control timers, with up to six PWM channels, deadtime generation and emergency stop – One 16-bit timer with two IC/OCs, one OCN/PWM, deadtime generation and emergency stop – Two 16-bit timers with IC/OC/OCN/PWM, deadtime generation and emergency stop – Two watchdog timers (independent, window) – One SysTick timer: 24-bit downcounter – One 16-bit basic timers to drive the DAC
■ Calendar RTC with Alarm, periodic wakeup from Stop/Standby
■ Communication interfaces – CAN interface (2.0B Active) LQFP64 LQFP100 LQFP144 UFBGA100 (10 × 10 mm) (14 × 14 mm) (20 x 20 mm) (7 x 7 mm) WLCSP100 (4.775 x 5.041 mm)