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OX16C954 Scheda tecnica (PDF) - List of Unclassifed Manufacturers

OX16C954 Datasheet PDF - List of Unclassifed Manufacturers
Il numero della parte OX16C954
Scarica  OX16C954 Scarica
Grandezza file   529.15 Kbytes
Page   54 Pages
Produttore elettronici  ETC [List of Unclassifed Manufacturers]
Homepage  
Logo ETC - List of Unclassifed Manufacturers
Spiegazioni elettronici High Performance Quad UART with 128-byte FIFOs Intel / Motorola Bus Interface

OX16C954 Datasheet (PDF)

Go To PDF Page Scarica Scheda tecnica
OX16C954 Datasheet PDF - List of Unclassifed Manufacturers

Il numero della parte OX16C954
Scarica  OX16C954 Click to download

Grandezza file   529.15 Kbytes
Page   54 Pages
Produttore elettronici  ETC [List of Unclassifed Manufacturers]
Homepage  
Logo ETC - List of Unclassifed Manufacturers
Spiegazioni elettronici High Performance Quad UART with 128-byte FIFOs Intel / Motorola Bus Interface

OX16C954 Scheda tecnica (HTML) - List of Unclassifed Manufacturers


OX16C954 Dettagli del prodotto

[OXFORD SEMICONDUCTOR LTD.]

DESCRIPTION
The OX16C954 is a single chip solution for 4 channel serial add-in cards.
Each UART channel in the OX16C954 offers data rates up to 15Mbps and 128-byte deep transmitter and receiver FIFOs. Deep FIFOs reduce CPU overhead and allow utilisation of higher data rates.
Each UART channel is software compatible with the widely used industry-standard 16C550 devices and compatibles, as well as the OX16C95x family of high performance UARTs. It is pin-compatible with the TL16C554, ST16C654 devices.

FEATURES
• Four independent full-duplex asynchronous 16C950 high performance UART channels
• 128-byte deep FIFO per transmitter and receiver
• UARTs fully software compatible with industry standard 16C55x type UARTs
• Pin compatible with TL16C554 and ST16C654
• Baud rates up to 15 Mbps in normal mode and 60Mbps in external 1x clock (isochronous) mode
• Readable FIFO levels
• Flexible clock prescaler from 1 to 31.875
• Automated in-band flow control using programmable Xon/Xoff characters, in both directions
• Automated out-of-band flow control using CTS#/RTS# and/or DSR#/DTR#
• Arbitrary trigger levels for receiver and transmitter FIFO interrupts and automatic in-band and out-ofband flow control
• Readable in-band and out-of-band flow control status
• Programmable special character detection
• Infra-red (IrDA) receiver and transmitter option
• 5, 6, 7, 8 and 9-bits data framing
• Detection of bad data in the receiver FIFO
• Independent channel reset by software
• Transmitter and receiver can be disabled
• Transmitter idle interrupt
• RS-485 buffer enable signals
• Four byte device ID
• Sleep mode (low operating current)
• System clock up to 60 MHz at 5V, 50 MHz at 3.3V
• 5.0 volt or 3.3v operation*
• 68pin PLCC and 80pin TQFP package options.




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