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ST72F324J2T6 Scheda tecnica(PDF) 11 Page - STMicroelectronics |
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ST72F324J2T6 Scheda tecnica(HTML) 11 Page - STMicroelectronics |
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11 / 156 page ![]() ST72324J/K 11/156 Notes: 1. In the interrupt input column, “eiX” defines the associated external interrupt vector. If the weak pull-up column (wpu) is merged with the interrupt column (int), then the I/O configuration is pull-up interrupt input, else the configuration is floating interrupt input. 2. In the open drain output column, “T” defines a true open drain I/O (P-Buffer and protection diode to VDD are not implemented). See See “I/O PORTS” on page 44. and Section 12.8 I/O PORT PIN CHARACTER- ISTICS for more details. 3. OSC1 and OSC2 pins connect a crystal/ceramic resonator, an RC oscillator, or an external source to the on-chip oscillator; see Section 1 INTRODUCTION and Section 12.5 CLOCK AND TIMING CHARAC- TERISTICS for more details. 4. On the chip, each I/O port has 8 pads. Pads that are not bonded to external pins are in input pull-up con- figuration after reset. The configuration of these pads must be kept at reset state to avoid added current consumption. |
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