DS31256 datasheet(106/183 Pages) MAXIM

106 / 183 page

DS31256 256-Channel, High-Throughput HDLC Controller

106 of 183

Table 9-G. Transmit DMA Main Operational Areas

DESCRIPTORS

FUNCTION

SECTION

Packet

A dedicated area of memory that describes the location and attributes of the

packet data.

9.3.2

Pending Queue

A dedicated area of memory that the host writes to inform the DMA that

packet data is queued and ready for transmission.

9.3.3

Done Queue

A dedicated area of memory that the DMA writes to inform the host that the

packet data has been transmitted.

9.3.4

Host Linking of Data Buffers

As previously mentioned, the data buffers are limited to a length of 8188 Bytes. If an outgoing packet

requires more memory space than the available data buffer contains, the host can link multiple data

buffers together to handle a packet length of any size. The host does this through the end-of-frame (EOF)

bit in the packet descriptor. Each data buffer has a one-to-one association with a packet descriptor. If the

host wants to link multiple data buffers together, the EOF bit is set to 0 in all but the last data buffer.

Figure 9-10 shows an example for HDLC channel 5 where the host has linked three data buffers

together. The transmit DMA knows where to find the next data buffer when the EOF bit is set to 0

through the next descriptor pointer field.

Host Linking of Packets (Packet Chaining)

The host also has the option to link multiple packets together in a chain. Through the chain valid (CV)

bit in the packet descriptor, the host can inform the transmit DMA that the next descriptor pointer field

contains the descriptor of another HDLC packet that is ready for transmission. The transmit DMA

ignores the CV bit until it sees EOF = 1, which indicates the end of a packet. If CV = 1 when EOF = 1,

this indicates to the transmit DMA that it should use the next descriptor pointer field to find the next

packet in the chain. Figure 9-12 shows an example of packet chaining. Each column represents a separate

packet chain. In column 1, three data buffers have been linked together by the host for packet #1, and the

host has created a packet chain by setting CV = 1 in the last descriptor of packet #1.

DMA Linking of Packets (Horizontal Link Listing)

The transmit DMA also has the ability to link packets together. Internally, the transmit DMA can store

up to two packet chains, but if the host places more packet chains into the pending queue, the transmit

DMA must begin linking these chains together externally. The transmit DMA does this by writing to

packet descriptors (Figure 9-12). If columns 1 and 2 were the only two packet chains queued for

transmission, then the transmit DMA would not need to link packet chains together, but as soon as

column 3 was queued for transmission, the transmit DMA had to store the third chain externally because

it had no more room internally. The transmit DMA links the packet chain in the third column to the one

in the second column by writing the first descriptor of the third chain in the next pending descriptor

pointer field of the first descriptor of the second column (it also sets the PV bit to 1). As shown in the

figure, this chaining was carried one step farther to link the fourth column to the third.

DS31256 Scheda tecnica(PDF) 106 Page - Maxim Integrated Products

DS31256 Scheda tecnica(HTML) 106 Page - Maxim Integrated Products

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Scheda tecnica Scarica

Link URL