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DSP56166ROM Scheda tecnica(PDF) 31 Page - Motorola, Inc |
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DSP56166ROM Scheda tecnica(HTML) 31 Page - Motorola, Inc |
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31 / 63 page ![]() PRELIMINARY - 6/15/93 21 DSP56166 Technical Data Sheet MOTOROLA AC Electrical Characteristics Capacitance Derating —External Bus Synchronous Timing VCC = 5.0 Vdc +/- 10%, TJ = -40 to +125˚ C, CL = 50 pF + 1 TTL Load. The DSP56166 External Bus Timing Specifications are designed and tested at the maximum capacitive load of 50 pF, including stray capacitance. Typically, the drive capability of the External Bus pins (A0-A15, D0-D23, PS/DS, RD, WR, R/W, BS, PEREN) derates linearly at 1 ns per 12 pF of additional capacitance from 50 pF to 250 pF of loading. Port B and C pins derate linearly at 1 ns per 5 pF of additional capacitance from 50 pF to 250 pF of loading. When an internal memory access follows an external memory access, the PS/DS, R/W, RD, WR, BS and PEREN strobes remain deasserted and A0-A15 do not change from their previous state. |
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