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LMH6704MF Scheda tecnica(PDF) 10 Page - National Semiconductor (TI) |
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LMH6704MF Scheda tecnica(HTML) 10 Page - National Semiconductor (TI) |
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10 / 12 page ![]() Application Information (Continued) P MAX = (150˚ – TAMB)/ θ JA, where TAMB = Ambient tempera- ture (˚C) and θ JA = Thermal resistance, from junction to ambient, for a given package (˚C/W). For the SOT23-6 pack- age θ JA is 187˚C/W. ESD PROTECTION The LMH6704 is protected against electrostatic discharge (ESD) on all pins. The LMH6704 will survive 2000V Human Body model and 200V Machine model events. Input and Output pins have ESD diodes to either supply pin (V + and V −) which are reverse biased and essentially have no effect under most normal operating conditions. There are occa- sions, however, when the ESD diodes will be evident. If the LMH6704 is driven by a large signal while the device is powered down, the ESD diodes might enter forward operat- ing region and conduct. The current that flows through the ESD diodes will either exit the chip through the supply pins or will flow through the device, hence it is possible to inad- vertently power up the LMH6704 with a large signal applied to the input pins. Shorting the power pins to each other will prevent the chip from being powered up through the input. www.national.com 10 |
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