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AD8452 Scheda tecnica(PDF) 17 Page - Analog Devices

Il numero della parte AD8452
Spiegazioni elettronici  Precision Integrated Analog Front End, Controller
PDF  35 Pages
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Produttore elettronici  AD [Analog Devices]
Homepage  http://www.analog.com
Logo AD - Analog Devices

AD8452 Scheda tecnica(HTML) 17 Page - Analog Devices

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AD8452
Data Sheet
Rev. 0 | Page 16 of 34
PULSE-WIDTH MODULATOR
TEMPERATURE (°C)
30
20
40
50
60
70
80
90
0
–10
10
–20
–30
–40
5.10
VIN = 6V
VIN = 24V
VIN = 60V
5.08
5.06
5.04
5.02
5.00
4.98
4.96
4.94
4.92
4.90
Figure 22. SS Pin Current vs. Temperature
CH1 5.00V 1MΩ
20.0M
1MΩ
20.0M
1MΩ
20.0M
1MΩ
20.0M
20µs/DIV
CH1
3.1V
CH3 5.00V
CH2 5.00V
CH4 5.00V
1
2
4
EN
DH
DL
SYNC
B
W
B
W
B
W
B
W
Figure 23. Timing, Referred to Startup (0 V to 5 V at EN Pin), As Observed
at Three Logic Output Pins When AD8452 Is in Charge Mode
1
2
3
4
CSS = 0.1µF
MODE = 5V
CH1 5.00V 1MΩ
20.0M
1MΩ
20.0M
1MΩ
20.0M
1MΩ
20.0M 20ms/DIV
CH1
2.3V
CH3 5.00V
CH2 2.00V
CH4 5.00V
EN
DH
DL
SS
B
W
B
W
B
W
B
W
Figure 24. Soft Start Ramp Timing at SS Pin, Referred to Startup (0 V to 5 V
at the EN Pin) As Observed at Logic Level Outputs, DH and DL,
When AD8452 Is in Charge Mode
1
2
3
4
EN
SS
DH
DL
CSS = 0.1µF
MODE = 0V
CH1 5.00V 1MΩ
20.0M
1MΩ
20.0M
1MΩ
20.0M
1MΩ
20.0M 20ms/DIV
CH1
2.3V
CH3 5.00V
CH2 5.00V
CH4 5.00V
B
W
B
W
B
W
B
W
Figure 25. Shows Reversal of DH Pin and DL Pin Timing at Startup
(0 V to 5 V at EN Pin) When AD8452 Is in Discharge Mode
210
30
70
110
150
190
50
90
130
170
50
150
100
200
250
300
fSET (kHz)
Figure 26. RFREQ (MASTER) vs. Switching Frequency (fSET)
0
1.5
3.0
4.5
6.0
7.5
9.0
500
450
400
350
300
250
200
150
100
50
0
PHASE DELAY (µs)
Figure 27. RSCFG (Calculated) vs. Phase Time Delay (tDELAY)



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