DA9213 datasheet(37/62 Pages) DIALOG

37 / 62 page

DA9213, DA9214, and DA9215

Multi-Phase 5A/Phase DC-DC Buck Converter

Datasheet

Revision 2.2

23-Oct-2017

CFR0011-120-00

37 of 62

SLAVEadr

REGadr

DATA

S = START condition

A = Acknowledge (low)

P = STOP condition

W = Write (low)

Master to Slave

Slave to Master

7-bits

1-bit

8-bits

Figure 25: 2-WIRE Byte Write (SDA Line)

When the host reads data from a register it first has to write to DA9213, DA9214, and DA9215 with

the target register address and then read from DA9213, DA9214, and DA9215 with a Repeated

START or alternatively a second START condition. After receiving the data, the host sends No

Acknowledge and terminates the transmission with a STOP condition. This is illustrated in Figure 26.

SLAVEadr W

REGadr

SLAVEadr

S = START condition

A = Acknowledge (low)

Sr = Repeated START condition

* = No Acknowledge

P = STOP condition

W = Write (low)

R = Read (high)

Master to Slave

7-bits

1-bit

8-bits

7-bits

DATA

1-bit

8-bits

SLAVEadr

7-bits

DATA

1-bit

8-bits

Slave to Master

SLAVEadr W

REGadr

7-bits

1-bit

8-bits

Figure 26: Examples of 2-WIRE Byte Read (SDA Line)

Consecutive (page) read out mode is initiated from the master by sending an Acknowledge instead of

Not acknowledge after receipt of the data word. The 2-WIRE control block then increments the

address pointer to the next 2-WIRE address and sends the data to the master. This enables an

unlimited read of data bytes until the master sends a Not acknowledge directly after the receipt of

data, followed by a subsequent STOP condition. If a non-existent 2-WIRE address is read out, the

DA9213, DA9214, and DA9215 will return code zero. This is illustrated in Figure 27.

SLAVEadr W A

REGadr

SLAVEadr

S = START condition

A = Acknowledge (low)

Sr = Repeat START condition

* = No Acknowledge

P = STOP condition

W = Write (low)

R = Read (high)

Master to Slave

Slave to Master

7-bits

1 bit

8-bits

7-bits

DATA

1-bit

8-bits

SLAVEadr

REGadr

SLAVEadr

7-bits

1-bit

8-bits

7-bits

DATA

1-bit

8-bits

DATA

8-bits

Figure 27: Examples of 2-WIRE Page Read (SDA Line)

Note that the slave address after the Repeated START condition must be the same as the previous

slave address.

Consecutive (page) write mode is supported if the Master sends several data bytes following a slave

address, stores the received data and sends an Acknowledge until the master sends the STOP

condition. This is illustrated in Figure 28.

DA9213 Scheda tecnica(PDF) 37 Page - Dialog Semiconductor

DA9213 Scheda tecnica(HTML) 37 Page - Dialog Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62

Scheda tecnica Scarica

Link URL