NJU3426 datasheet(7/12 Pages) NJRC

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NJU3426

(5) SERIAL DATA TRANSMISSION

Communication between the NJU3426 and MPU uses the serial data transmission with synchronous clock, and 8 bits

serial data constitutes 1 word.

Each bit on the SI pin is fetched at the rising edge of the serial clock (SCK), and the

entire 8 bits are loaded as 1 word at the rising edge of the chip select (CSb).

During one communication, multiple words can be transferred continuously. The 1

st word must be either “Display data

RAM address”, “Command register 1” or “Command register 2”.

When the 1

st word is RAM address data, the 2nd and

ascending words must be display data.

When it’s the “Command register 1 or 2”, the 2

nd and ascending words are

ignored.

SERIAL DATA TIMING

SERIAL DATA TRANSMISSION FORMAT

•

Serial input data

DATA FORMAT FOR THE 1

ST WORD

DISPLAY DATA RAM ADRESS

AD4

AD3

AD2

AD1

AD0

*:don’t care

COMMAND DATA 1

DT2

DT1

DT0

DSP

DE2

DE1

DE0

*:don’t care

COMMAND DATA 2

DS3

DS2

DS1

DS0

*:don’t care

SERIAL DATA FOR THE 2

ND AND ASCENDING WORDS

When the 1

st word is the “Display data RAM address”, the 2nd and ascending words must be display data.

When the 1

st word is the “Command register 1 or 2”, the 2nd and ascending words are ignored.

SCK

WORD 1

WORD 2

RD n

CSb

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