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MP8768 Scheda tecnica(PDF) 3 Page - Monolithic Power Systems |
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MP8768 Scheda tecnica(HTML) 3 Page - Monolithic Power Systems |
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3 / 13 page ![]() MP8768 – 8A, 28V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFET MP8768 Rev. 1.0 www.MonolithicPower.com 3 12/12/2013 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. ELECTRICAL CHARACTERISTICS (continued) VIN = 12V, TA = +25°C, unless otherwise noted. Parameters Symbol Condition Min Typ Max Units Power Good Delay PGTd 20 μs Power Good Sink Current Capability PGVOL Sink 4mA 0.4 V Power Good Leakage Current PGLKG VPG = 3.3V 10 nA Under Voltage Lockout Threshold Rising 3.9 4.1 4.3 V Under Voltage Lockout Threshold Hysteresis 880 mV VCC Regulator VCC 4.5 5 V VCC Load Regulation Icc=20mA 5 % Gate Drive Sink Impedance (4) RSINK 1 Ω Gate Drive Source Impedance (4) RSOURCE 4 Ω Thermal Shutdown TSD 150 °C Note: 4) Guaranteed by design. PIN FUNCTIONS Pin # Name Description 1 FB Feedback. An external resistor divider from the output to GND, tapped to the FB pin, sets the output voltage. To prevent current limit run away during a short circuit fault condition the frequency fold-back comparator lowers the oscillator frequency when the FB voltage is below 400mV. 2 PG Power good output, the output of this pin is an open drain and is low if the output voltage is lower than 10% of the nominal voltage. There is a 20µs delay to pull PG if the output voltage is lower than 10% of regulation value. 3 EN/SYNC EN=1 to enable the MP8768. External clock can be applied to EN pin for changing switching frequency. For automatic start-up, connect EN pin to VIN with 100KΩ resistor. 4,5,6 IN Supply Voltage. The MP8768 operates from a +4.5V to +28V input rail. C1 is needed to decouple the input rail. Use wide PCB traces and multiple vias to make the connection. 7 AAM Tie to ground forces the MP8768 in synchronous Mode. Tie to a voltage set by a resistor divider forces the MP8768 into non-synchronous mode when load is small. 8,9,10 SW Switch Output. Use wide PCB traces and multiple vias to make the connection. 11 BST Bootstrap. A capacitor connected between SW and BS pins is required to form a floating supply across the high-side switch driver. 12 VCC Bias Supply. Decouple with 1µF capacitor. 13 BG Low Side Gate Drive output. 14 GND Exposed Pad System Ground. This pin is the reference ground of the regulated output voltage. For this reason care must be taken in PCB layout. Connect exposed pad to GND plane for optimal thermal performance. |
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