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MP8865 Scheda tecnica(PDF) 17 Page - Monolithic Power Systems |
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MP8865 Scheda tecnica(HTML) 17 Page - Monolithic Power Systems |
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17 / 29 page ![]() MP8865 – SYNCHRONOUS STEP-DOWN CONVERTER MP8865 Rev. 1.03 www.MonolithicPower.com 17 1/18/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. If V_BOOT= “0,” the output voltage is determined by the I2C control loop (output voltage is sensed through VOUT), and the FB feedback control loop is disabled. If FB is pulled up to VCC, the chip starts up directly to the default 0.9V output voltage. In this case, the output voltage is determined by the I2C control loop. The output reference voltage scaling is realized by adjusting the internal reference voltage (V_REF), which is the non-inverted input of the error amplifier. After the MP8865 receives a valid data byte of the output reference voltage setting, it searches the corresponding reference voltage from the truth table and then sends the command to adjust VREF with a controlled slew rate. The slew rate is determined by 3-bits of another register, which can be read and write accordingly. |
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