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LTM4615 Scheda tecnica(PDF) 9 Page - Linear Technology |
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LTM4615 Scheda tecnica(HTML) 9 Page - Linear Technology |
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9 / 32 page ![]() LTM4642 9 4642fb For more information www.linear.com/LTM4642 pin FuncTions RUN1, RUN2 (G3, B3): Run Control Pins. A source can be used to enable the RUN pins with an external pull-up resistor. Forcing either of these pins below 1.2V will shut down the corresponding outputs. An additional 5µA pull- up current is added to this pin, once the RUN pin rises above 1.2V. Also, active control or pull-up resistors can be used to enable the RUN pin. The maximum voltage is 6V on these pins. There are 100k resistors on RUN1,2 to ground. It is recommended to use an external pull-up resistor to VIN to enable the RUN pin. See the Applications Information section. VRNG1 (G4): Used at Final Test. Tie to INTVCC in normal operation. This pin can also be used to adjust the current limitofchannel1. AnexternalresistivedividerfromINTVCC can be used to set the voltage on the VRNG pin between 0.6V to 1V, resulting in a maximum sense voltage between 30mV and 50mV. For applications that require less than 7A of the default peak current limit, the VRNG pin voltage can be scaled down to obtain a desired current limit level. VIN1 (G5, G6, 67), VIN2 (B5, B6, B7): Power Input Pins. Apply input voltage between these pins and GND pins. Recommendplacinginputdecouplingcapacitancedirectly between VIN pins and GND pins. VOUT1 (F1, G1, G2, H1, H2), VOUT2 (A1, A2, B1, B2, C1): Power Output Pins. Apply output load between these pins and PGND pins. Recommend placing output decoupling capacitance directly between these pins and PGND pins. SW1, SW2 (H3, A3): Switching Test Pins. These pins are provided externally to check the operation frequency. |
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