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LT1469 Scheda tecnica(PDF) 21 Page - Linear Technology |
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LT1469 Scheda tecnica(HTML) 21 Page - Linear Technology |
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21 / 26 page ![]() LTC2326-16 21 232616fa For more information www.linear.com/LTC2326-16 boarD layouT To obtain the best performance from the LTC2326-16 a printed circuit board (PCB) is recommended. Layout for PCB should ensure the digital and analog signal lines are separated as much as possible. In particular, care should be taken not to run any digital clocks or signals alongside analog signals or underneath the ADC. Recommended Layout ThefollowingisanexampleofarecommendedPCBlayout. A single solid ground plane is used. Bypass capacitors to the supplies are placed as close as possible to the supply pins. Low impedance common returns for these bypass capacitors are essential to the low noise operation of the ADC. The analog input traces are screened by ground. For more details and information refer to DC1908, the evaluation kit for the LTC2326-16. Partial Top Silkscreen Partial Layer 1 Component Side |
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