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LTC4236 Scheda tecnica(PDF) 5 Page - Linear Technology |
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LTC4236 Scheda tecnica(HTML) 5 Page - Linear Technology |
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5 / 24 page ![]() LTC4236 5 4236f For more information www.linear.com/LTC4236 elecTrical characTerisTics Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to GND unless otherwise specified. Note 3: An internal clamp limits the DGATE1 and CPO1 pins to a minimum of 10V above and a diode below IN1. Driving these pins to voltages beyond the clamp may damage the device. Note 4: An internal clamp limits the DGATE2 and CPO2 pins to a minimum of 10V above and a diode below D2SRC. Driving these pins to voltages beyond the clamp may damage the device. Note 5: An internal clamp limits the HGATE pin to a minimum of 10V above and a diode below OUT. Driving this pin to voltages beyond the clamp may damage the device. Note 6: Thermal resistance is specified when the exposed pad is soldered to a 3" x 5" , four layer, FR4 board. |
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