 2000 Microchip Technology Inc.

DS39504A-page 4-7

Section 4 Architecture

4

4.4

I/O Descriptions

Table 4-1 gives a brief description of device pins and the functions that may be multiplexed to a

port pin. Multiple functions may exist on one port pin. When multiplexing occurs, the peripheral

module’s functional requirements may force an override of the data direction (TRIS bit) of the port

pin (such as in the A/D and Comparator modules).

Table 4-1:

I/O Descriptions

Pin Name

Pin

Type

Buffer

Type

Description

A19

O

—

System bus address line 19

A18

O

—

System bus address line 18

A17

O

—

System bus address line 17

A16

O

—

System bus address line 16

AD15

I/O

TTL

System bus address/data line 15

AD14

I/O

TTL

System bus address/data line 14

AD13

I/O

TTL

System bus address/data line 13

AD12

I/O

TTL

System bus address/data line 12

AD11

I/O

TTL

System bus address/data line 11

AD10

I/O

TTL

System bus address/data line 10

AD9

I/O

TTL

System bus address/data line 9

AD8

I/O

TTL

System bus address/data line 8

AD7

I/O

TTL

System bus address/data line 7

AD6

I/O

TTL

System bus address/data line 6

AD5

I/O

TTL

System bus address/data line 5

AD4

I/O

TTL

System bus address/data line 4

AD3

I/O

TTL

System bus address/data line 3

AD2

I/O

TTL

System bus address/data line 2

AD1

I/O

TTL

System bus address/data line 1

AD0

I/O

TTL

System bus address/data line 0

ALE

O

—

System bus address latch enable strobe

Analog Input Channels

AN0

I

Analog

AN1

I

Analog

AN2

I

Analog

AN3

I

Analog

AN4

I

Analog

AN5

I

Analog

AN6

I

Analog

AN7

I

Analog

AN8

I

Analog

AN9

I

Analog

AN10

I

Analog

AN11

I

Analog

AN12

I

Analog

AN13

I

Analog

AN14

I

Analog

AN15

I

Analog

PP

Analog Power

Legend: TTL = TTL-compatible input

CMOS = CMOS compatible input or output

ST = Schmitt Trigger input with CMOS levels

O = output

PU = Weak internal pull-up

I = input

Analog = Analog input or output

P = Power