AMD8513 datasheet(69/88 Pages) INFINEON

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Data Sheet

Rev. 1.21, 2005-12-05

ADM8513

Data Sheet

Registers Description

Note: Jabber Detect Only used in 10Base-T mode. Read as 0 in 100Base-TX mode.

PHY Identifier 2 and 3

Each PHY has an identifier, which is assigned to the device.

The identifier contains a total of 32 bits, which consists of the following: 22 bits of a 24 bit organizationally unique

identifier (OUI) for the manufacturer; a 6-bit manufacturer’s model number; a 4-bit manufacturer’s revision number.

For an explanation of how the OUI maps to the register, please refer to IEEE 802-1990 clause 5.1

10HD

10 Mbit/s Half Duplex

10HDN, PHY is not 10 Mbit/s Half duplex capable

10HD, PHY is 10 Mbit/s Half duplex capable

100TFD

100BASE-T2 Full Duplex

Not Supported

100THD

100BASE-T2 Half Duplex

Not Supported

MFPS

MF Preamble Suppression

MFPSN, PHY cannot accept management frames with preamble

suppression

MFPS, PHY can accept management frames with preamble

suppression

ANC

Auto-neg Complete

ANI, Auto-neg incomplete

ANC, Auto-neg completed

ro, lh

Remote Fault

RFN, No remote fault detected

RF, Remote fault detected

ANA

Auto-neg Ability

ANN, PHY cannot auto-negotiate

AN, PHY can auto-negotiate

ro, ll

Link Status

LD, Link is down

LU, Link is up

ro, lh

Jabber Detect

JCD, Jabber condition detected

Extended Capability

BSC, Basic register set capabilities only

EC, Extended register capabilities

Field

Bits

Type

Description

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