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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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LP5018 Scheda tecnica(PDF) 39 Page - Texas Instruments |
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LP5018 Scheda tecnica(HTML) 39 Page - Texas Instruments |
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39 / 49 page  Graph Placeholder C00 Graph Placeholder C00 IREF IREF IREF SET V R K I = ´ 39 LP5018, LP5024 www.ti.com SLVSEB8 – MARCH 2018 Product Folder Links: LP5018 LP5024 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated Typical Application (continued) (2) The SCL and SDA lines must each have a pullup resistor placed somewhere on the line (the pullup resistors are normally located on the bus master). In typical applications, values of 1.8 kΩ to 4.7 kΩ are used. VCAP is internal LDO output pin. This pin must be connected through a 1-µF capacitor to GND. Please put the capacitor as close to the device as possible. TI recommends having a 1-µF capacitor between VCC and GND to ensure proper operation. Please put the capacitor as close to the device as possible. 9.2.3 Application Curves Figure 57. Figure 58. |
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