ISL6752DBEVAL1Z datasheet(8/18 Pages) RENESAS

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ISL6752

FN9181 Rev 4.00

Page 8 of 18

August 1, 2016

VADJ Delay Time

TA = +25°C (OUTLx Delayed) (Note 9)

VADJ = 0

280

300

320

VADJ = 0.5V

105

118

VADJ = 1.0V

VADJ = 1.5V

VADJ = 2.0V

TA = +25°C (OUTLxN Delayed)

VADJ = VREF

280

300

320

VADJ = VREF - 0.5V

100

114

VADJ = VREF - 1.0V

VADJ = VREF - 1.5V

VADJ = VREF - 2.0V

THERMAL PROTECTION

Thermal Shutdown

(Note 6)

130

140

150

°C

Thermal Shutdown Clear

(Note 6)

115

125

135

°C

Hysteresis, Internal Protection

(Note 6)

°C

NOTES:

6. Limits established by characterization and are not production tested.

7. This is the maximum duty cycle achievable using the specified values of RTD and CT. Larger or smaller maximum duty cycles may be obtained using

other values for these components. See Equations 1 through 3.

8. Adjust VDD below the UVLO stop threshold prior to setting at 7V.

9. When OUTx is delayed relative to OUTLxN (VADJ < 2.425V), the delay duration as set by VADJ should not exceed 90% of the CT discharge time

(dead time) as determined by CT and RTD.

10. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization

and are not production tested.

Electrical Specifications Recommended operating conditions unless otherwise noted. Refer to “Functional Block Diagram” on page 3

and “typical application on Figure 2 on page 4 and Figure 3 on page 5. 9V < VDD < 20V, RTD = 10.0kΩ CT = 470pF, TA = -40°C to +105°C, Typical values

are at TA = +25°C. (Continued)

PARAMETER

TEST CONDITIONS

MIN

(Note 10)TYP

MAX

(Note 10)UNIT

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