AV2636

Product Datasheet

SAIM[1:0]: Serial Audio Interface Mode Control

00: I

01: DSP ‘early’ mode

10: right justified mode

11: DSP ‘late’ mode

Format[1:0]: Serial Audio Interface Data Resolution

00: 24-bit resolution (default)

01: 20-bit resolution

10: 18-bit resolution

11: 16-bit resolution

Master Clock and Sample Rate Setting Register (CREG3[7:0])

CREG3[7:0]

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

Address

7’h03

Reserved

CKSET[3:0]

Default Value

0

0

0

0

0

0

0

0

CKSET[3:0]: The internal operation of AV2636 is affected by the relations between MCK

frequency and input audio sample rate. The correct setting of these 4-bit based on the relations

ensures the correct operation of the device. The following table shows the values of the 4-bit.

CKSET[3:0] For Various Clock and Sample Rate

Sample Rate (kHz)

MCK (MHz)

CKSET[3:0]

32/44.1/48

8.192/11.2896/12.288

256fs

0

0

0

0

1X Speed

32/44.1/48

12.288/16.934/18.432

384fs

1

0

0

0

88.2/96

11.2896/12.288

128fs

0

0

0

1

88.2/96

16.9344/18.432

192fs

1

0

0

1

88.2/96

22.5792/24.576

256fs

0

0

1

0

2X Speed

88.2/96

33.8688/36.864

384fs

1

0

1

0

192

12.288

64fs

0

0

1

1

192

18.432

96fs

1

0

1

1

192

24.576

128fs

0

1

0

0

192

36.864

192fs

1

1

0

0

192

49.152

256fs

0

1

0

1

4X Speed

192

73.728

384fs

1

1

0

1

AVS Technology, Inc.

11-16

August 18, 2004

www.avstech.com