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S29CD032G Scheda tecnica(PDF) 67 Page - SPANSION

Il numero della parte S29CD032G
Spiegazioni elettronici  CMOS 2.5 VOLT ONLY BURST MODE DUAL BOOT, SIMULTANEOUS READ /WRITE FLASH MEMORY
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March 22, 2004 30606B0
S29CD032G
67
Ad va nc e
In forma t i o n
The remaining scenario is that the system initially determines that the toggle bit
is toggling and DQ5 has not gone high. The system may continue to monitor the
toggle bit and DQ5 through successive read cycles, determining the status as de-
scribed in the previous paragraph. Alternatively, it may choose to perform other
system tasks. In this case, the system must start at the beginning of the algo-
rithm when it returns to determine the status of the operation (top of Figure 7).
START
No
Yes
Yes
DQ5 = 1?
No
Yes
DQ6 = Toggle?
No
Read Byte
(DQ0-DQ7)
Address = VA
DQ6 = Toggle?
Read Byte Twice
(DQ 0-DQ7)
Adrdess = VA
Read Byte
(DQ0-DQ7)
Address = VA
FAIL
PASS
Notes:
1. Read toggle bit with two immediately consecutive reads to determine whether or not it is toggling. See text.
2. Recheck toggle bit because it may stop toggling as DQ5 changes to “1”. See text.
Figure 7. Toggle Bit Algorithm
(Note 1)
(Notes
1, 2)



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