FT27C010-12DI datasheet(2/11 Pages) FORCE

2 / 11 page

FT27C010(L)

The FT27C010(L) in available in a industry stan-

dard JEDEC-approved programmable (UVerasable)

Ceramic DIl, LCC, packages. All devices fea-

ture two line control (CE, OE) to give designers the flexibil-

ity to prevent bus contention.

With 128K byte storage capability, the FT27C010(L) allows

firmware to be stored reliably and to be accessed by the

system without the delays of mass storage media.

Force FT27C010(L) have additional features to ensure high

quality and efficient production use. The Program-

ming Algorithm reduces the time required to program the

part and guarantees reliable programming. Programming

time is typically only 100 µs/byte. The Integrated Product

Identification Code electronically identifies the device and

manufacturer. This feature is used by industry standard

programming equipment to select the proper programming

algorithms and voltages.

System Considerations

Switching between active and standby conditions via the

Chip Enable pin may produce transient voltage excursions.

Unless accommodated by the system design, these tran-

sients may exceed data sheet limits, resulting in device

non-conformance. At a minimum, a 0.1 µF high frequency,

low inherent inductance, ceramic capacitor should be uti-

lised for each device. This capacitor should be connected

between the VCC and Ground terminals of the device, as

close to the device as possible. Additionally, to stabilise the

supply voltage level on printed circuit boards with large

EPROM arrays, a 4.7 µF bulk electrolytic capacitor should

be utilised, again connected between the VCC and Ground

terminals. This capacitor should be positioned as close as

possible to the point where the power supply is connected

to the array.

Block Diagram

2006

2/11

Rev 1

FT27C010-12DI Scheda tecnica(PDF) 2 Page - Force Technologies Ltd