SSM2518CBZ-R7 datasheet(42/48 Pages) AD

Il numero della parte	SSM2518CBZ-R7

Spiegazioni elettronici	Digital Input Stereo, 2 W, Class-D Audio Power Amplifier

PDF	48 Pages

Scroll/Zoom	100%

Produttore elettronici	AD [Analog Devices]

Homepage	http://www.analog.com

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42 / 48 page

SSM2518

Datasheet

Rev. B | Page 42 of 48

Bits

Bit Name

Settings

Description

Reset

Access

[3:0]

DRC_SMIN

DRC Minimum Output Signal Amplitude Setting. This is the minimum

output level produced by the DRC and is used to indicate the expander

lower threshold, or output signal level when the input rises beyond the

noise gate threshold.

0xC

0000

−51 dB

0001

−54 dB

0010

−57 dB

0011

−60 dB

0100

−63 dB

0101

−66 dB

0110

−69 dB

0111

−72 dB

1000

−75 dB

1001

−78 dB

1010

−81 dB

1011

−84 dB

1100

−87 dB

1101

−90 dB

1110

−93 dB

1111

−96 dB

DRC CONTROL 6 REGISTER

Address: 0x0F, Reset: 0x77, Name: DRC_Control_6

Table 28. Bit Descriptions for DRC_Control_6

Bits

Bit Name

Settings

Description

Reset

Access

[7:4]

DRC_ATT

DRC Attack Time. Used to smooth the gain curve at the thresholds (knees)

of each DRC function.

0x7

0000

0 ms

0001

0.1 ms

0010

0.19 ms

0011

0.37 ms

0100

0.75 ms

0101

1.5 ms

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