Motore di ricerca datesheet componenti elettronici
  Italian  ▼
ALLDATASHEETIT.COM

X  

PEX8716 Scheda tecnica(PDF) 1 Page - PLX Technology

Il numero della parte PEX8716
Spiegazioni elettronici  16-lane, 4-port PCIe Gen 3 switch
PDF  5 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Produttore elettronici  PLX [PLX Technology]
Homepage  http://www.plxtech.com
Logo PLX - PLX Technology

PEX8716 Scheda tecnica(HTML) 1 Page - PLX Technology

  PEX8716 Datasheet HTML 1Page - PLX Technology PEX8716 Datasheet HTML 2Page - PLX Technology PEX8716 Datasheet HTML 3Page - PLX Technology PEX8716 Datasheet HTML 4Page - PLX Technology PEX8716 Datasheet HTML 5Page - PLX Technology  
Zoom Inzoom in Zoom Outzoom out
 1 / 5 page
background image
© PLX Technology, www.plxtech.com
Page 1 of 5
10/20/2010, Version 1.0
PEX 8716, PCI Express Gen 3 Switch, 16 Lanes, 4 Ports
Figure 1. Common Port Configurations
PEX 8716
x4
PEX 8716
x8
PEX 8716
x4
PEX 8716
x8
x8
3 x4
x4
x4
x2
NT
x2
x4
Highlights
PEX 8716 General Features
o
16-lane, 4-port PCIe Gen 3 switch
-
Integrate 8.0 GT/s SerDes
d
19 x 19mm
2, 324-pin FCBGA package
o
o
Typical Power: 4.0 Watts
res
PEX 8716 Key Featu
o
a
St ndards Compliant
-
PCI Express Base Specification, r3.0
)
(compatible w/ PCIe r1.0a/1.1 & 2.0
ec, r1.2
-
PCI Power Management Sp
-
Microsoft Vista Compliant
ices
-
Supports Access Control Serv
-
Dynamic link-width control
peed control
-
Dynamic SerDes s
o
gh
Hi
Performance
performancePAK
ng (bandwidth throttling)
Read Paci
Multicast
t Pool
Dynamic Buffer/FC Credi
ic
-
Non-blocking switch fabr
-
Full line rate on all ports
-
Packet Cut-Thru with 112ns max packet
latency (x4 to x4)
-
2KB Max Payload Size
o
Flexible Configuration
-
Ports configurable as x1, x2, x4, x8
-
Registers configurable with strapping
2
t software
pins, EEPROM, I C, or hos
-
Lane and polarity reversal
-
Compatible with PCIe 1.0a PM
o
Multi-Host & Fail-Over Support
sparent (NT) port
-
Configurable Non-Tran
-
Failover with NT port
-
Up to 2 upstream/Host ports with 1+1 or
tream ports
N+1 failover to other ups
o
Quality of Service (QoS)
-
Eight traffic classes per port
-
Weighted round-robin source
port arbitration
o
ailability, Serviceability
Reliability, Av
♦ visionPAK
Per Port Performance Monitoring
header counters
Per port payload &
SerDes Eye Capture
PCIe Packet Generator
Error Injection and Loopback
nals
-
3 Hot Plug Ports with native HP Sig
-
All ports hot plug capable thru I
2C
port)
(Hot Plug Controller on every
bit support
-
ECRC and Poison
-
Data Path parity
-
Memory (RAM) Error Correction
ignals
-
INTA# and FATAL_ERR# s
-
Advanced Error Reporting
-
ailable
Port Status bits and GPIO av
• Per port error diagnostics
-
JTAG AC/DC boundary scan
The ExpressLane™ PEX 8716 device offers Multi-Host PCI Express
switching capability enabling users to connect multiple hosts to their
respective endpoints via scalable, high bandwidth, non-blocking
interconnection to a wide variety of applications including servers,
storage, communications, and graphics platforms. The PEX 8716 is
well suited for fan-out, aggregation, and peer-to-peer traffic patterns.
Multi-Host Architecture
The PEX 8716 employs an enhanced version of PLX’s field tested PEX 8616
PCIe switch architecture, which allows users to configure the device in legacy
single-host mode or multi-host mode with up to two host ports capable of 1+1
(one active & one backup) or N+1 (N active & one backup) host failover. This
powerful architectural enhancement enables users to build PCIe based systems
to support high-availability, failover, redundant, or clustered systems.
High Performance & Low Packet Latency
The PEX 8716 architecture supports packet cut-thru with a maximum
latency of 112ns (x4 to x4). This, combined with large packet memory,
flexible common buffer/FC credit pool and non-blocking internal switch
architecture, provides full line rate on all ports for performance-hungry
applications such as servers and switch fabrics. The low latency enables
applications to achieve high throughput and performance. In addition to low
latency, the device supports a packet payload size of up to 2048 bytes,
enabling the user to achieve even higher throughput.
Data Integrity
The PEX 8716 provides end-to-end CRC (ECRC) protection and Poison bit
support to enable designs that require end-to-end data integrity. PLX also
supports data path parity and memory (RAM) error correction circuitry
throughout the internal data paths as packets pass through the switch.
Flexible Configuration
The PEX 8716’s 4 ports can
be configured to lane widths
of x1, x2, x4, or x8. Flexible
buffer allocation, along with
the device's flexible packet
flow
control,
maximizes
throughput for applications
where more traffic flows in
the downstream, rather than
upstream, direction. Any port
can be designated as the
upstream port, which can be
changed dynamically. Figure
1 shows some of the PEX
8716’s
common
port
configurations
in
legacy
Single-Host mode.


Codice articolo simile - PEX8716

Produttore elettroniciIl numero della parteScheda tecnicaSpiegazioni elettronici
logo
AVAGO TECHNOLOGIES LIMI...
PEX8716 AVAGO-PEX8716 Datasheet
436Kb / 5P
PCI Express Gen 3 Switch
More results

Descrizione simile - PEX8716

Produttore elettroniciIl numero della parteScheda tecnicaSpiegazioni elettronici
logo
PLX Technology
PEX8616 PLX-PEX8616 Datasheet
199Kb / 4P
PCIe Gen2, 5.0GT/s 16-lane, 4-port Switch
PEX8613 PLX-PEX8613 Datasheet
204Kb / 4P
PCIe Gen 2, 5.0GT/s 12-lane, 3-port Switch
PEX8617 PLX-PEX8617 Datasheet
391Kb / 4P
PCIe Gen 2, 5.0GT/s 16-lane, 4-port Switch
logo
AVAGO TECHNOLOGIES LIMI...
PEX8613 AVAGO-PEX8613 Datasheet
202Kb / 4P
PCIe Gen 2, 5.0GT/s 12-lane, 3-port Switch
PEX8616 AVAGO-PEX8616 Datasheet
215Kb / 4P
PCIe Gen2, 5.0GT/s 16-lane, 4-port Switch
PEX8617 AVAGO-PEX8617 Datasheet
384Kb / 4P
PCIe Gen 2, 5.0GT/s 16-lane, 4-port Switch
logo
PLX Technology
PEX8713 PLX-PEX8713 Datasheet
688Kb / 5P
12-lane, 10-port PCIe Gen 3 switch
PEX8717 PLX-PEX8717 Datasheet
716Kb / 5P
16-lane, 10-port PCIe Gen 3 switch
PEX8724 PLX-PEX8724 Datasheet
337Kb / 5P
24-lane, 6-port PCIe Gen 3 switch
PEX8732 PLX-PEX8732 Datasheet
719Kb / 5P
32-lane, 8-port PCIe Gen 3 switch
More results


Html Pages

1 2 3 4 5


Scheda tecnica Scarica

Go To PDF Page


Link URL



Lei ha avuto il aiuto da alldatasheet?  [ DONATE ] 

Di alldatasheet   |   Richest di pubblicita   |   contatti   |   Privacy Policy   |   Collegamento alla scheda tecnica    |   scambio Link   |   Ricerca produttore
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com