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AD9544/PCBZ Scheda tecnica(PDF) 34 Page - Analog Devices

Il numero della parte AD9544/PCBZ
Spiegazioni elettronici  Quad Input, 10-Output, Dual DPLL, 1 pps Synchronizer and Jitter Cleaner
PDF  62 Pages
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Produttore elettronici  AD [Analog Devices]
Homepage  http://www.analog.com
Logo AD - Analog Devices

AD9544/PCBZ Scheda tecnica(HTML) 34 Page - Analog Devices

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AD9544
Data Sheet
Rev. 0 | Page 34 of 62
SMALL CELL BASE STATION
In this application (shown in Figure 42), the AD9544 provides
all of the synchronization to the baseband unit of a small cell
base station. The built in JESD204B support enables a particu-
larly compact and efficient design.
The AD9544 can lock to any of the following: GPS, SyncE, or
loop timed (if using SONET/SDH or passive optical network
backhaul). The PLL0 of the AD9544 provides one device clock
and up to four device system reference clocks that can be used
to clock wireless transceivers, such as the AD9371.
The PLL1 of the AD9544 clocks the backhaul interface and,
optionally, the CPU interface.
The EEPROM support of the AD9544 allows the AD9544 to
load its configuration automatically at power-up.
SYSTEM
CLOCK PLL
STATUS AND
CONTROL PINS
AD9544
TEMPERATURE
SENSOR
SYSTEM CLOCK
COMPENSATION
REFERENCE
SWITCHING
CONTROL
REFERENCE
MONITORS
TDC
REFERENCE
INPUTS
NCO
DPLL
DPLL0
PLL
APLL0
VCO
NCO
DPLL
DPLL1
PLL
APLL1
VCO
PLL0
PLL1
DISTRIBUTION
OUTPUTS
DISTRIBUTION
OUTPUTS
÷2
÷Q
÷R
OUT0AP,
OUT0AN,
OUT0BP,
OUT0BN,
OUT0CP,
OUT0CN
OUT1AP,
OUT1AN,
OUT1BP,
OUT1BN
XOA,
XOB
INTERNAL ZERO DELAY
INTERNAL ZERO DELAY
EEPROM
(OPTIONAL)
SYSTEM
CLOCK
DIGITAL
CROSS
POINT
MUX
SERIAL PORT (SPI/I2C)
AND EEPROM
CONTROLLER
M0 TO M6
REFA,
REFAA,
REFB,
REFBB
÷2
÷Q
INPUT
GPS, LOOP TIMED
FROM NETWORK
SyncE
RADIO
(2 CARDS)
EXTERNAL
NETWORK
ETHERNET
SyncE
PASSIVE OPTICAL NETWORK
SONET/SDH
SYSREF TO
RADIO 1
SYSREF TO
RADIO 2
SYSREF TO
BASEBAND
1:4
FANOUT
BASEBAND
PROCESSOR
NETWORK
CONNECTION
30.72MHz
61.44MHz
122.88MHz
245.76MHz
307.2MHz
10MHz
25MHz
125MHz
156.25MHz
312.5MHz
30.72MHz
61.44MHz
122.88MHz
JESD204B SUPPORT
SERIAL PORT
Figure 42. Small Cell Application



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