Triple PLL Field Prog. Spread Spectrum Clock Synthesizer

MDS 280 C

2

Revision 062205

Integrated Circuit Systems, Inc.

ICS280

PRELIMINARY INFORMATION

Pin Assignment

Pin Descriptions

12

1

11

2

10

3

9

4

S0

5

S1

6

VDD

7

GND

8

VDD

PDTS

S2

GND

GND

VDD

CLK2

CLK4

16

15

14

13

CLK3

X2

16 pin (173 mil) TSSOP

X1/ICLK

CLK1

Pin

Number

Pin

Name

Pin

Type

Pin Description

1

GND

Power

Connect to ground.

2

S0

Input

Select pin 0. Internal pull-up resistor.

3

S1

Input

Select pin 1. Internal pull-up resistor.

4VDD

Power

Connect to +3.3 V.

5

CLK1

Output

Output clock 1. Weak internal pull-down when tri-state.

6

CLK2

Output

Output clock 2. Weak internal pull-down when tri-state.

7

GND

Power

Connect to ground.

8

X1/ICLK

XI

Crystal input. Connect this pin to a crystal or external input clock.

9

X2

XO

Crystal Output. Connect this pin to a crystal. Float for clock input.

10

VDD

Power

Connect to +3.3 V.

11

CLK3

Output

Output clock 3. Weak internal pull-down when tri-state.

12

CLK4

Output

Output clock 4. Weak internal pull-down when tri-state.

13

GND

Power

Connect to ground.

14

PDTS

Input

Power-down tri-state. Powers down entire chip and tri-states clock outputs

when low. Internal pull-up resistor.

15

VDD

Power

Connect to +3.3 V.

16

S2

Input

Select pin 2. Internal pull-up resistor.