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TUSB5052 Scheda tecnica(PDF) 72 Page - Texas Instruments |
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TUSB5052 Scheda tecnica(HTML) 72 Page - Texas Instruments |
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72 / 84 page ![]() 9–4 Table 9–2. Vector Interrupt Values (Continued) G[3:0] (Hex) I[2:0] (Hex) VECTOR (Hex) INTERRUPT SOURCE 7 0 70 PP: RxF interrupt 7 1 72 PP: TxE interrupt 7 2 74 PP: FALT interrupt 7 3 76 PP: ACK interrupt 7 4 78 PP: PER interrupt 7 5-7 7A 7E Not used 8 0 80 DMA1 interrupt 8 1 82 DMA2 interrupt 8 2 84 DMA3 interrupt 8 3 86 DMA4 interrupt 8 4 88 DMA5 interrupt 8 5-7 8A-8E Not used 9-15 X 90 FE Not used 9.1.6 Logical Interrupt Connection Diagram (Internal/External) Figure 9–1 shows the logical connection of the interrupt sources and its relation with XINTO. The priority encoder generates an 8-bit vector, corresponding to 64 interrupt sources (not all are used). The interrupt priorities are hard wired. Vector 0x88 is the highest and 0x12 is the lowest. Vector Priority Encoder Interrupts IEO (INT0) XINTO IEO Figure 9–1. Internal Vector Interrupt |
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